1307 search results - page 135 / 262 » Low Power Hardware for a High Performance PDA |
151
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
Software implementations of channel decoding algorithms are attractive for communication systems with their large variety of existing and emerging standards due to their flexibil...
156
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ISCAS
2002
IEEE
15 years 11 months ago
2002
IEEE
Due to technology limitations as well as stringent operating conditions that are imposed, the design of fully integrated analog RF front-end circuits is aimed at the edge of the r...
163
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ICS
2000
Tsinghua U.
15 years 10 months ago
2000
Tsinghua U.
The Midimew network is an excellent contender for implementing the communication subsystem of a high performance computer. This network is an optimal 2D topology in the sense ther...
158
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VLSID
2009
IEEE
16 years 6 months ago
2009
IEEE
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
149
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ISCA
2008
IEEE
16 years 20 days ago
2008
IEEE
Server storage systems use a large number of disks to achieve high performance, thereby consuming a significant amount of power. In this paper, we propose to significantly reduc...