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IOLTS
2005
IEEE
141views Hardware» more  IOLTS 2005»
14 years 1 months ago
A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...
Arijit Raychowdhury, Swaroop Ghosh, Kaushik Roy
DATE
2009
IEEE
242views Hardware» more  DATE 2009»
14 years 2 months ago
A high performance reconfigurable Motion Estimation hardware architecture
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. For the recently available high definition frame sizes and hi...
Ozgur Tasdizen, Halil Kukner, Abdulkadir Akin, Ilk...
VTS
2000
IEEE
97views Hardware» more  VTS 2000»
13 years 12 months ago
A Low-Speed BIST Framework for High-Performance Circuit Testing
Testing of high performance integrated circuits is becoming increasingly a challenging task owing to high clock frequencies. Often testers are not able to test such devices due to...
Hans G. Kerkhoff, Mansour Shashaani, Manoj Sachdev
ISLPED
1999
ACM
90views Hardware» more  ISLPED 1999»
13 years 12 months ago
Way-predicting set-associative cache for high performance and low energy consumption
This paper proposes a new approach using way prediction for achieving high performance and low energy consumption of set-associative caches. By accessing only a single cache way p...
Koji Inoue, Tohru Ishihara, Kazuaki Murakami
DSD
2009
IEEE
147views Hardware» more  DSD 2009»
13 years 11 months ago
A High Performance Hardware Architecture for One Bit Transform Based Motion Estimation
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low computat...
Abdulkadir Akin, Yigit Dogan, Ilker Hamzaoglu