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VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
14 years 8 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
ICCD
2001
IEEE
110views Hardware» more  ICCD 2001»
14 years 4 months ago
Low-Energy DSP Code Generation Using a Genetic Algorithm
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
Markus Lorenz, Rainer Leupers, Peter Marwedel, Tho...
DAC
1998
ACM
14 years 8 months ago
Reducing Power in High-Performance Microprocessors
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is ...
Vivek Tiwari, Deo Singh, Suresh Rajgopal, Gaurav M...
SBACPAD
2003
IEEE
120views Hardware» more  SBACPAD 2003»
14 years 24 days ago
Comparison of Genomes Using High-Performance Parallel Computing
Comparison of the DNA sequences and genes of two genomes can be useful to investigate the common functionalities of the corresponding organisms and get a better understanding of h...
Nalvo F. Almeida Jr., Carlos E. R. Alves, Edson C&...
ASPDAC
2004
ACM
79views Hardware» more  ASPDAC 2004»
13 years 11 months ago
Priority assignment optimization for minimization of current surge in high performance power efficient clock-gated microprocesso
Abstract - We propose an integrated archltectural/physicdplanning approach named priority assignment optimization to mioimize the current surge in high performance power eifkient c...
Yiran Chen, Kaushik Roy, Cheng-Kok Koh