1307 search results - page 40 / 262 » Low Power Hardware for a High Performance PDA |
DATE
1998
IEEE
13 years 12 months ago
1998
IEEE
Within this paper the gate-level power-simulation tool GliPS (Glitch Power Simulator) is presented, which gives excellent accuracy (in the range of transistor-level simulators) at...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract— In this paper, we present an algorithm/architecturelevel design solution for implementing state-parallel adaptive Viterbi decoders that, compared with their Viterbi cou...
DATE
2003
IEEE
14 years 27 days ago
2003
IEEE
This paper presents a on-chip stack based memory organization that effectively reduces the energy dissipation in programmable embedded system architectures. Most embedded systems ...
IPPS
1998
IEEE
13 years 12 months ago
1998
IEEE
Abstract. Programmability is an important capability that provides flexible computing devices, but it incurs significant performance and power penalties. We have proposed an archit...
MICRO
2003
IEEE
14 years 26 days ago
2003
IEEE
This paper describes several methods for improving the scalability of memory disambiguation hardware for future high ILP processors. As the number of in-flight instructions grows...