1307 search results - page 63 / 262 » Low Power Hardware for a High Performance PDA |
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
Embedded processors are increasingly deployed in applications requiring high performance with good real-time characteristics whilst being low power. Parallelism has to be extracte...
TVLSI
2010
13 years 2 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
— This paper analyzes the behavior of interconnects in the highly structured environment of a network-on-chip (NoC). Two distinct classes of wires are considered, namely links be...