1307 search results - page 90 / 262 » Low Power Hardware for a High Performance PDA |
116
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ISCAS
2006
IEEE
16 years 1 days ago
2006
IEEE
— By implementing an FPGA-based simulator, we investigate the performance of high-rate quasi-cyclic (QC) LDPC codes for the magnetic recording channel at very low sector error ra...
157
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DATE
2007
IEEE
16 years 11 days ago
2007
IEEE
One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as hig...
173
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ICIP
2002
IEEE
16 years 7 months ago
2002
IEEE
We propose a new, very low complexity, single-pass, algorithm for compression of continuous tone compound documents, known as GRAFIT (GuaRAnteed FIT) that can guarantee a minimum ...
125
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ICCD
2005
IEEE
16 years 3 months ago
2005
IEEE
Content Addressable Memories (CAM) are widely used for the tag portions in highly associative caches. Since data are not explicitly read out of tag array in CAM search, the detect...
167
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DATE
2010
IEEE
15 years 8 months ago
2010
IEEE
Various X-filling methods have been proposed for reducing the shift and/or capture power in scan testing. The main drawback of these methods is that X-filling for low power leads t...