331 search results - page 61 / 67 » Low power implementation of a turbo-decoder on programmable ... |
161
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VEE
2009
ACM
16 years 16 days ago
2009
ACM
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
163
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NOCS
2009
IEEE
16 years 14 days ago
2009
IEEE
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
171
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CORR
2011
Springer
15 years 22 days ago
2011
Springer
We provide an overall description of the Ciao multiparadigm programming system emphasizing some of the novel aspects and motivations behind its design and implementation. An impor...
163
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MICRO
2009
IEEE
16 years 11 days ago
2009
IEEE
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
165
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ISCA
2010
IEEE
15 years 10 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...