1004 search results - page 10 / 201 » Low power methodology and design techniques for processor de... |
GLVLSI
2005
IEEE
14 years 2 months ago
2005
IEEE
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...
DAC
1999
ACM
14 years 9 months ago
1999
ACM
We propose a method for power optimization that considers glitch reduction by gate sizing based on the statistical estimation of glitch transitions. Our method reduces not only th...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
— Reduction in test power is important to improve battery life in portable devices employing periodic self-test, to increase reliability of testing and to reduce test-cost. In sc...
ISQED
2010
IEEE
13 years 10 months ago
2010
IEEE
A new SRAM design is proposed. Body biasing improves the static noise margin (SNM) improved by at least 15% compared to the standard cells. Through using this technique, lowering ...
ISCAS
2002
IEEE
14 years 1 months ago
2002
IEEE