552 search results - page 51 / 111 » Low power techniques for Motion Estimation hardware |
180
click to vote
ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...
176
click to vote
CODES
2005
IEEE
15 years 11 months ago
2005
IEEE
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
139
click to vote
ISLPED
1995
ACM
15 years 9 months ago
1995
ACM
We argue that the clocked-CMOS (C2MOS) circuit family provides a very high throughput and low power alternative to other existing circuit techniques for the fast developing market...
189
click to vote
WISA
2009
Springer
15 years 10 months ago
2009
Springer
We introduce low-cost hardware for performing non-invasive side-channel attacks on Radio Frequency Identi cation Devices (RFID) and develop techniques for facilitating a correlatio...
184
click to vote
ICIP
2007
IEEE
16 years 7 months ago
2007
IEEE
Motion information scalability is an important requirement for a fully scalable video codec, especially in low bit rate or small resolution decoding scenarios. So far, several lay...