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» Low power techniques for Motion Estimation hardware
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ASPDAC
2006
ACM
178views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Hardware architecture design of an H.264/AVC video codec
Abstract—H.264/AVC is the latest video coding standard. It significantly outperforms the previous video coding standards, but the extraordinary huge computation complexity and m...
Tung-Chien Chen, Chung-Jr Lian, Liang-Gee Chen
ISLPED
2010
ACM
236views Hardware» more  ISLPED 2010»
13 years 8 months ago
Analysis and design of ultra low power thermoelectric energy harvesting systems
Thermal energy harvesting using micro-scale thermoelectric generators is a promising approach to alleviate the power supply challenge in ultra low power systems. In thermal energy...
Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaush...
FPL
2003
Springer
120views Hardware» more  FPL 2003»
14 years 28 days ago
Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms
The power-efficient implementation of motion estimation algorithms on a system comprised by an FPGA and an external memory is presented. Low power consumption is achieved by implem...
Konstantinos Tatas, K. Siozios, Dimitrios Soudris,...
ICMCS
2005
IEEE
194views Multimedia» more  ICMCS 2005»
14 years 1 months ago
An hardware architecture for 3D object tracking and motion estimation
We present a method to track and estimate the motion of a 3D object with a monocular image sequence. The problem is based on the state equations and is solved by a sequential Mont...
Patrick Lanvin, Jean-Charles Noyer, Mohammed Benje...
ISQED
2010
IEEE
170views Hardware» more  ISQED 2010»
13 years 9 months ago
New SRAM design using body bias technique for ultra low power applications
A new SRAM design is proposed. Body biasing improves the static noise margin (SNM) improved by at least 15% compared to the standard cells. Through using this technique, lowering ...
Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Yn...