42 search results - page 5 / 9 » Low-Power, High-Speed CMOS VLSI Design |
GLVLSI
2002
IEEE
14 years 2 months ago
2002
IEEE
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
VLSID
2002
IEEE
14 years 10 months ago
2002
IEEE
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
ISLPED
2007
ACM
13 years 11 months ago
2007
ACM
Energy-efficient realization of soft-output signal detection is of great importance in emerging high-speed multiple-input multiple-output (MIMO) wireless communication systems. T...
ISLPED
2009
ACM
14 years 4 months ago
2009
ACM
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
ASPDAC
2004
ACM
14 years 3 months ago
2004
ACM
– This paper presents a high speed VLSI implementation of wavelet and golay error control codes. The design has been fabricated by MOSIS in a TSMC 0.25 µm CMOS process. Experime...