165 search results - page 2 / 33 » Low-power circuits using dynamic threshold devices |
MICRO
2003
IEEE
14 years 11 days ago
2003
IEEE
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
SOCC
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper, new SRAM cell design methods for FinFET technology are proposed. One of the most important features of FinFET is that the independent front and back gate can be bia...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
GLVLSI
2005
IEEE
14 years 22 days ago
2005
IEEE
We present simulations for ultra-thin body, fully-depleted, double-gate (DG) silicon-on-insulator (SOI) devices that can be readily optimized for both static power loss and perfor...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...