262 search results - page 41 / 53 » MAME: A Compression Function with Reduced Hardware Requireme... |
ASPDAC
2009
ACM
13 years 11 months ago
2009
ACM
Abstract-- The increasing wire delay constraints in deep submicron VLSI designs have led to the emergence of scalable and modular Network-on-Chip (NoC) architectures. As the power ...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Traditional digital circuit synthesis flows start from an HDL behavioral definition and assume that circuit functions are almost completely defined, making don't-care conditio...
ISLPED
1995
ACM
13 years 11 months ago
1995
ACM
We will present a power estimation technique for digital integrated circuits that operates at the register transfer level RTL . Such a high-level power estimation capability is r...
FTCS
1998
13 years 8 months ago
1998
The trend in implementing today's embedded applications is toward the use of commercial-off-the-shelf open architecture. Reducing costs and facilitating systems integration a...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents an efficient image signal processing structure for CMOS image sensors to achieve low area and power consumption. Although CMOS image sensors (CISs) have variou...