Sciweavers

266 search results - page 27 / 54
» MIPS
Sort
View
DATE
2004
IEEE
159views Hardware» more  DATE 2004»
13 years 11 months ago
Compositional Memory Systems for Data Intensive Applications
To alleviate the system performance unpredictability of multitasking applications running on multiprocessor platforms with shared memory hierarchies we propose a task level set ba...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
CHES
2006
Springer
105views Cryptology» more  CHES 2006»
13 years 11 months ago
Implementing Cryptographic Pairings on Smartcards
Abstract. Pairings on elliptic curves are fast coming of age as cryptographic primitives for deployment in new security applications, particularly in the context of implementations...
Michael Scott, Neil Costigan, Wesam Abdulwahab
HICSS
1995
IEEE
109views Biometrics» more  HICSS 1995»
13 years 11 months ago
HINT: A new way to measure computer performance
The computing community has long faced the problem of scientifically comparing different computers and different algorithms. When architecture, method, precision, or storage capac...
John L. Gustafson, Quinn Snell
STOC
1995
ACM
108views Algorithms» more  STOC 1995»
13 years 11 months ago
A parallel repetition theorem
We show that a parallel repetition of any two-prover one-round proof system (MIP(2, 1)) decreases the probability of error at an exponential rate. No constructive bound was previou...
Ran Raz
MVA
1992
143views Computer Vision» more  MVA 1992»
13 years 9 months ago
A Real-Time Vision System Using Integrated Memory Array Processor Prototype LSI
This study reports on the performance of a Real-Time Vision System (RVS) and its use of an IMAP prototype LSI. This LSI integrates eight 8 bit processors and a 144 Kbit SRAM on a ...
Yoshihiro Fujita, Nobuyuki Yamashita, Shin'ichiro ...