39 search results - page 8 / 8 » Macro-driven circuit design methodology for high-performance... |
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
— Power gating is a circuit technique that enables high performance and low power operation. One of the challenges in power gating is sizing the sleep transistor which is used to...
FPGA
1999
ACM
14 years 1 hour ago
1999
ACM
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
DAC
1996
ACM
13 years 12 months ago
1996
ACM
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
ISCAS
1999
IEEE
14 years 8 hour ago
1999
IEEE
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...