Sciweavers

1056 search results - page 114 / 212
» Mapping an Application to a Control Architecture: Specificat...
Sort
View
HPCA
2001
IEEE
14 years 8 months ago
Reevaluating Online Superpage Promotion with Hardware Support
fipical translation lookaside buffers (TLBs)can map a far smaller region of memory than application footprints demand, and the cost of handling TLB misses therefore limits the per...
Zhen Fang, Lixin Zhang, John B. Carter, Wilson C. ...
ISCA
2008
IEEE
205views Hardware» more  ISCA 2008»
14 years 2 months ago
VEAL: Virtualized Execution Accelerator for Loops
Performance improvement solely through transistor scaling is becoming more and more difficult, thus it is increasingly common to see domain specific accelerators used in conjunc...
Nathan Clark, Amir Hormati, Scott A. Mahlke
HPDC
2010
IEEE
13 years 8 months ago
Parallel processing of data from very large-scale wireless sensor networks
In this paper we explore the problems of storing and reasoning about data collected from very large-scale wireless sensor networks (WSNs). Potential worldwide deployment of WSNs f...
Christine Jardak, Janne Riihijärvi, Frank Old...
ESANN
2008
13 years 9 months ago
Conditional prediction of time series using spiral recurrent neural network
Frequently, sequences of state transitions are triggered by specific signals. Learning these triggered sequences with recurrent neural networks implies storing them as different at...
Huaien Gao, Rudolf Sollacher
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
14 years 7 days ago
CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
Bharat P. Dav