17 search results - page 3 / 4 » Mapping of DSP Algorithms on the MONTIUM Architecture |
FPGA
2004
ACM
14 years 24 days ago
2004
ACM
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
An important primitive in the hardware implementations of linear DSP transforms is a circuit that can multiply an input value by one of several different preset constants. We prop...
CODES
2003
IEEE
14 years 22 days ago
2003
IEEE
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...