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DAC
2011
ACM
12 years 7 months ago
Enabling system-level modeling of variation-induced faults in networks-on-chips
Process Variation (PV) is increasingly threatening the reliability of Networks-on-Chips. Thus, various resilient router designs have been recently proposed and evaluated. However,...
Konstantinos Aisopos, Chia-Hsin Owen Chen, Li-Shiu...
EUROPAR
2003
Springer
14 years 1 months ago
Distributed Application Monitoring for Clustered SMP Architectures
Abstract. Performance analysis for terascale computing requires a combination of new concepts including distribution, on-line processing and automation. As a foundation for tools r...
Karl Fürlinger, Michael Gerndt
ISCA
1996
IEEE
99views Hardware» more  ISCA 1996»
14 years 2 days ago
Performance Comparison of ILP Machines with Cycle Time Evaluation
Many studies have investigated performance improvement through exploiting instruction-level parallelism (ILP) with a particular architecture. Unfortunately, these studies indicate...
Tetsuya Hara, Hideki Ando, Chikako Nakanishi, Masa...
ICPP
2000
IEEE
14 years 9 days ago
Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel
MATLAB is one of the most popular languages for desktop numerical computations as well as for signal and image processing applic ations. Applying parallel processing techniques to...
Malay Haldar, Anshuman Nayak, Abhay Kanhere, Pramo...
CASES
2003
ACM
14 years 1 months ago
Vectorizing for a SIMdD DSP architecture
The Single Instruction Multiple Data (SIMD) model for fine-grained parallelism was recently extended to support SIMD operations on disjoint vector elements. In this paper we demon...
Dorit Naishlos, Marina Biberstein, Shay Ben-David,...