Sciweavers

273 search results - page 14 / 55
» Mechanization for solving SPP by reducing order method
Sort
View
ISCAPDCS
2003
13 years 9 months ago
N-Tuple Compression: A Novel Method for Compression of Branch Instruction Traces
Branch predictors and processor front-ends have been the focus of a number of computer architecture studies. Typically they are evaluated separately from other components using tr...
Aleksandar Milenkovic, Milena Milenkovic, Jeffrey ...
ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
14 years 4 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
DATE
2006
IEEE
98views Hardware» more  DATE 2006»
14 years 2 months ago
Power-constrained test scheduling for multi-clock domain SoCs
This paper presents a wrapper and test access mechanism design for multi-clock domain SoCs that consists of cores with different clock frequencies during test. We also propose a t...
Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara
SAT
2005
Springer
142views Hardware» more  SAT 2005»
14 years 1 months ago
Optimizations for Compiling Declarative Models into Boolean Formulas
Advances in SAT solver technology have enabled many automated analysis and reasoning tools to reduce their input problem to a SAT problem, and then to use an efficient SAT solver ...
Darko Marinov, Sarfraz Khurshid, Suhabe Bugrara, L...
CEC
2007
IEEE
14 years 2 months ago
Target shape design optimization by evolving splines
Abstract— Target shape design optimization problem (TSDOP) is a miniature model for real world design optimization problems. It is proposed as a test bed to design and analyze op...
Pan Zhang, Xin Yao, Lei Jia, Bernhard Sendhoff, Th...