117 search results - page 20 / 24 » Memory Access Schemes for Configurable Processors |
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
The increasing demand for computational cycles is being met by the use of multi-core processors. Having large number of cores per node necessitates multi-core aware designs to ext...
ISCA
2000
IEEE
14 years 2 days ago
2000
IEEE
Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper...
MICRO
2003
IEEE
14 years 29 days ago
2003
IEEE
Data-parallel programs are both growing in importance and increasing in diversity, resulting in specialized processors targeted at specific classes of these programs. This paper ...
RTSS
2003
IEEE
14 years 29 days ago
2003
IEEE
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
TVLSI
2010
13 years 2 months ago
2010
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...