236 search results - page 29 / 48 » Memory Bank Predictors |
FPL
1999
Springer
14 years 2 days ago
1999
Springer
The paper presents a development framework for the Xputer prototype Map-oriented Machine with Parallel Data Access (MoM-PDA). The MoM-PDA operates as a reconfigurable accelerator t...
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
With the increasing performance gap between the processor and the memory, the importance of caches is increasing for high performance processors. However, with reducing feature si...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
Performance gains in memory have traditionally been obtained by increasing memory bus widths and speeds. The diminishing returns of such techniques have led to the proposal of an ...