39 search results - page 3 / 8 » Minimizing the power consumption of a Chip Multiprocessor un... |
HPCA
2006
IEEE
14 years 8 months ago
2006
IEEE
Previous proposals for power-aware thread-level parallelism on chip multiprocessors (CMPs) mostly focus on multiprogrammed workloads. Nonetheless, parallel computation of a single...
CODES
2001
IEEE
13 years 11 months ago
2001
IEEE
In this paper, we explore a hybrid global/local search optimization framework for dynamic voltage scaling in embedded multiprocessor systems. The problem is to find, for a multipr...
EMSOFT
2005
Springer
14 years 1 months ago
2005
Springer
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Recently, under a fixed power budget, asymmetric multiprocessors (AMP) have been proposed to improve the performance of multi-threaded applications compared to symmetric multiproc...
AINA
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract— Transporting video over wireless networks has twofold constraints. Not only should it satisfy delay requirements but power minimization and QoS issues should be handled...