356 search results - page 20 / 72 » Modeling Cache Sharing on Chip Multiprocessor Architectures |
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Analytical modeling is an alternative to detailed performance simulation with the potential to shorten the development cycle and provide additional insights. This paper proposes a...
DSD
2010
IEEE
13 years 7 months ago
2010
IEEE
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...
DAC
2008
ACM
14 years 9 months ago
2008
ACM
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
ISCA
1993
IEEE
14 years 22 days ago
1993
IEEE
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
AMAST
2008
Springer
13 years 10 months ago
2008
Springer
This paper gives a correctness proof for the on-chip COMA cache coherence protocol that supports the Microgrid of microtheaded architecture, a multi-core architecture capable of in...