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ASPDAC
2010
ACM
165views Hardware» more  ASPDAC 2010»
13 years 5 months ago
Dynamic power estimation for deep submicron circuits with process variation
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
Quang Dinh, Deming Chen, Martin D. F. Wong
ISLPED
2003
ACM
85views Hardware» more  ISLPED 2003»
14 years 24 days ago
ILP-based optimization of sequential circuits for low power
The power consumption of a sequential circuit can be reduced by decomposing it into subcircuits which can be turned off when inactive. Power can also be reduced by careful state e...
Feng Gao, John P. Hayes
ICPPW
2008
IEEE
14 years 2 months ago
Energy Modeling of Processors in Wireless Sensor Networks Based on Petri Nets
Power minimization is a serious issue in wireless sensor networks to extend the lifetime and minimize costs. However, in order to gain an accurate understanding of issues regardin...
Ali Shareef, Yifeng Zhu
DATE
2005
IEEE
108views Hardware» more  DATE 2005»
14 years 1 months ago
A Technology-Aware and Energy-Oriented Topology Exploration for On-Chip Networks
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik
DATE
2005
IEEE
98views Hardware» more  DATE 2005»
14 years 1 months ago
Hardware Accelerated Power Estimation
In this paper, we present power emulation, a novel design paradigm that utilizes hardware acceleration for the purpose of fast power estimation. Power emulation is based on the ob...
Joel Coburn, Srivaths Ravi, Anand Raghunathan