Sciweavers

458 search results - page 15 / 92
» Modeling and Formal Verification of DHCP Using SPIN
Sort
View
WICSA
2008
13 years 9 months ago
Simulating Software Architectures for Functional Analysis
Simulation is a mean for verifying the quality of an architectural specification. Some approaches have been proposed in the past. Each approach has its own internal simulation eng...
Henry Muccini, Patrizio Pelliccione
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
13 years 12 months ago
Formal verification of analog circuits in the presence of noise and process variation
We model and verify analog designs in the presence of noise and process variation using an automated theorem prover, MetiTarski. Due to the statistical nature of noise, we propose ...
Rajeev Narayanan, Behzad Akbarpour, Mohamed H. Zak...
RTCSA
1997
IEEE
13 years 12 months ago
Behavior verification of hybrid real-time requirements by qualitative formalism
Although modern control theories have been successfully applied to solve a variety of problems, they are often mathematically and physically too specific to describe and analyze t...
Jang-Soo Lee, Sung Deok Cha
ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
13 years 11 months ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
CSFW
2011
IEEE
12 years 7 months ago
Formal Analysis of Protocols Based on TPM State Registers
—We present a Horn-clause-based framework for analysing security protocols that use platform configuration registers (PCRs), which are registers for maintaining state inside the...
Stéphanie Delaune, Steve Kremer, Mark Dermo...