1151 search results - page 8 / 231 » Modelling Digital Circuits Problems with Set Constraints |
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
This paper presents the Quantum-Dot Cellular Automata (QCA) physical design problem, in the context of the VLSI physical design problem. The problem is divided into three subprobl...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
Abstract - Today's digital design systems are running out of steam, when it comes to meeting the challenges presented by simultaneous switching, power consumption and reliabil...
VLSID
2008
IEEE
14 years 8 months ago
2008
IEEE
Negative Bias Temperature Instability (NBTI) has been identified as a major and critical reliability issue for PMOS devices in nano-scale designs. It manifests as a negative thres...
ICCAD
1998
IEEE
13 years 12 months ago
1998
IEEE
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...