6229 search results - page 25 / 1246 » Models of Computation for Networks on Chip |
VLSID
2004
IEEE
14 years 9 months ago
2004
IEEE
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...
DATE
2004
IEEE
14 years 15 days ago
2004
IEEE
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
VLSID
2006
IEEE
14 years 9 months ago
2006
IEEE
The two dominant architectural choices for implementing efficient communication fabrics for SoC's have been transaction-based buses and packet-based Networks-onChip (NoC). Bo...
ISQED
2006
IEEE
14 years 2 months ago
2006
IEEE
— In this paper, we propose an efficient algorithm to reduce the voltage noises for on-chip power/ground (P/G) networks of VLSI. The new method is based on the sequence of linea...
SECON
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--Today's mobile devices support many wireless technologies to achieve ubiquitous connectivity. Economic and energy constraints, however, drive the industry to impleme...