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ISMVL
2002
IEEE
120views Hardware» more  ISMVL 2002»
14 years 19 days ago
An Impact of Introducing Multi-Level Signals to a Bandpass Cascaded Delta-Sigma Modulator
An impact of introducing multi-level signals to a bandpass delta-sigma modulator (DSM), which is of particular interest for wireless communications applications, has been investig...
Takao Waho, Shin-ya Kobayashi, Koji Matsuura
ICC
2000
IEEE
111views Communications» more  ICC 2000»
14 years 4 days ago
Detection of Linear Modulations in the Presence of Strong Phase and Frequency Instabilities
—Noncoherent sequence detection algorithms, recently proposed by the authors, have a performance which approaches that of coherent detectors and are robust to phase and frequency...
Giulio Colavolpe, Riccardo Raheli, Giorgio Picchi
DATE
1998
IEEE
110views Hardware» more  DATE 1998»
13 years 12 months ago
Scheduling and Module Assignment for Reducing Bist Resources
Built-in self-test BIST techniques modify functional hardware to give a data path the capability to test itself. The modi cation of data path registers into registers BIST resourc...
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breue...
ICCAD
1994
IEEE
104views Hardware» more  ICCAD 1994»
13 years 12 months ago
Module selection and data format conversion for cost-optimal DSP synthesis
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
Kazuhito Ito, Lori E. Lucke, Keshab K. Parhi
ISCAS
1994
IEEE
111views Hardware» more  ISCAS 1994»
13 years 12 months ago
Linear Phase Cosine Modulated Maximally Decimated Filter Banks with Perfect Reconstruction
In this paper a new type of maximally decimated FIR cosine modulated filter banks is proposed. Each analysis and synthesis filter in this filter bank has linear phase. We can desig...
Yuan-Pei Lin, P. P. Vaidyanathan