575 search results - page 54 / 115 » Multi-Valued Logic Synthesis |
DAC
2008
ACM
14 years 11 months ago
2008
ACM
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
ICCAD
2002
IEEE
14 years 6 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
ICCAD
2004
IEEE
14 years 6 months ago
2004
IEEE
Polynomial expressions are used to compute a wide variety of mathematical functions commonly found in signal processing and graphics applications, which provide good opportunities...
VTS
1996
IEEE
14 years 2 months ago
1996
IEEE
Designing a testable circuit is often a two step process. First, the circuit is designed to conform to the functional specifications. Then, the testability aspects are added. By t...
VLDB
1990
ACM
14 years 2 months ago
1990
ACM
Database programming requires having the knowledge of database semantics both to maintain database integrity and to explore more optimization opportunities. Automated programming ...