575 search results - page 78 / 115 » Multi-Valued Logic Synthesis |
ISSS
1995
IEEE
14 years 1 months ago
1995
IEEE
Designers of embedded systems are facing ever tighter constraintson design time, but computer aided design tools for embedded systems have not kept pace with these trends. The Chi...
DAC
2008
ACM
14 years 11 months ago
2008
ACM
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
DAC
2006
ACM
14 years 11 months ago
2006
ACM
In this paper we propose a new communication synthesis approach targeting systems with sequential communication media (SCM). Since SCMs require that the reading sequence and writi...
FCCM
2002
IEEE
14 years 2 months ago
2002
IEEE
Several projects have developed compiler tools that translate high-level languages down to hardware description languages for mapping onto FPGAbased reconfigurable computers. Thes...
ISSS
2002
IEEE
14 years 2 months ago
2002
IEEE
Scheduling is widely recognized as a very important step in highlevel synthesis. Nevertheless, it is usually done without taking into account the effects on the actual hardware im...