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CODES
2005
IEEE
14 years 3 months ago
Enhancing security through hardware-assisted run-time validation of program data properties
The growing number of information security breaches in electronic and computing systems calls for new design paradigms that consider security as a primary design objective. This i...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
ISLPED
2005
ACM
102views Hardware» more  ISLPED 2005»
14 years 3 months ago
Snug set-associative caches: reducing leakage power while improving performance
As transistors keep shrinking and on-chip data caches keep growing, static power dissipation due to leakage of caches takes an increasing fraction of total power in processors. Se...
Jia-Jhe Li, Yuan-Shin Hwang
WDAG
2005
Springer
104views Algorithms» more  WDAG 2005»
14 years 3 months ago
Polymorphic Contention Management
Abstract. In software transactional memory (STM) systems, a contention manager resolves conflicts among transactions accessing the same memory locations. Whereas atomicity and ser...
Rachid Guerraoui, Maurice Herlihy, Bastian Pochon
ICDCSW
2003
IEEE
14 years 3 months ago
Convergence of IPsec in Presence of Resets
IPsec is the current security standard for the Internet Protocol IP. According to this standard, a selected computer pair (p, q) in the Internet can be designated a “security ass...
Chin-Tser Huang, Mohamed G. Gouda, E. N. Elnozahy
ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
14 years 3 months ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...