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FCCM
1997
IEEE
118views VLSI» more  FCCM 1997»
14 years 2 months ago
Implementation of single precision floating point square root on FPGAs
Square root operation is hard to implement on FPGAs because of the complexity of the algorithms. In this paper, we present a non-restoring square root algorithm and two very simpl...
Yamin Li, Wanming Chu
ARITH
2009
IEEE
14 years 4 months ago
Multi-operand Floating-Point Addition
The design of a component to perform parallel addition of multiple floating-point (FP) operands is explored in this work. In particular, a 3-input FP adder is discussed in more d...
Alexandre F. Tenca
TC
2010
13 years 8 months ago
Redundant-Digit Floating-Point Addition Scheme Based on a Stored Rounding Value
—Due to the widespread use and inherent complexity of floating-point addition, much effort has been devoted to its speedup via algorithmic and circuit techniques. We propose a ne...
Ghassem Jaberipur, Behrooz Parhami, Saeid Gorgin
ARITH
2003
IEEE
14 years 1 months ago
Representable Correcting Terms for Possibly Underflowing Floating Point Operations
Studying floating point arithmetic, authors have shown that the implemented operations (addition, subtraction, multiplication, division and square root) can compute a result and a...
Sylvie Boldo, Marc Daumas
ARITH
2007
IEEE
14 years 4 months ago
Solving Constraints on the Intermediate Result of Decimal Floating-Point Operations
The draft revision of the IEEE Standard for FloatingPoint Arithmetic (IEEE P754) includes a definition for decimal floating-point (FP) in addition to the widely used binary FP s...
Merav Aharoni, Ron Maharik, Abraham Ziv