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VLSID
2002
IEEE
14 years 10 months ago
2002
IEEE
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
HPCA
2008
IEEE
14 years 10 months ago
2008
IEEE
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
HPCA
2008
IEEE
14 years 10 months ago
2008
IEEE
A conceptually appealing approach to supporting a broad range of workloads is a system comprising many small cores that can be fused, on demand, into larger cores. We demonstrate ...
HPCA
2007
IEEE
14 years 10 months ago
2007
IEEE
Memory bugs are a broad class of bugs that is becoming increasingly common with increasing software complexity, and many of these bugs are also security vulnerabilities. Unfortuna...
HPCA
2006
IEEE
14 years 10 months ago
2006
IEEE
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...