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VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
14 years 10 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
14 years 10 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal
HPCA
2008
IEEE
14 years 10 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
CHI
2003
ACM
14 years 10 months ago
Strategy hubs: next-generation domain portals with search procedures
Current search tools on the Web, such as general-purpose search engines (e.g. Google) and domain-specific portals (e.g. MEDLINEplus), do not provide search procedures that guide u...
Suresh K. Bhavnani, Christopher K. Bichakjian, Tim...
CHI
2002
ACM
14 years 10 months ago
Quantitative analysis of scrolling techniques
We propose a formal experimental paradigm designed to help evaluate scrolling interaction techniques. Such a method is needed by interaction designers to quantify scrolling perfor...
Ken Hinckley, Edward Cutrell, Steve Bathiche, Tim ...
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