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» Noise considerations in circuit optimization
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ICCAD
2009
IEEE
94views Hardware» more  ICCAD 2009»
13 years 5 months ago
Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint
We propose a layout-driven test-architecture design and optimization technique for core-based system-on-chips (SoCs) that are fabricated using three-dimensional (3D) integration. ...
Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. ...
DATE
2008
IEEE
131views Hardware» more  DATE 2008»
14 years 2 months ago
Optimal High-Resolution Spectral Analyzer
This paper presents a new application field for the Goertzel algorithm. The test of mixed-signal circuits involves the generation and analysis of signals. A standard method for th...
A. Tchegho, Heinz Mattes, Sebastian Sattler
CISS
2008
IEEE
14 years 2 months ago
Optimal memoryless relays with noncoherent modulation
Abstract—We derive optimal memoryless relays using noncoherent modulation over additive white Gaussian noise (AWGN) channels with or without fading. The derivation is flexible, ...
David F. Crouse, Christian R. Berger, Shengli Zhou...
GECCO
2003
Springer
132views Optimization» more  GECCO 2003»
14 years 1 months ago
Circuit Bipartitioning Using Genetic Algorithm
Abstract. In this paper, we propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local op...
Jong-Pil Kim, Byung Ro Moon
INFORMATICALT
2010
107views more  INFORMATICALT 2010»
13 years 6 months ago
Optimization of Formant Feature Based Speech Recognition
The paper deals with the use of formant features in dynamic time warping based speech recognition. These features can be simply visualized and give a new insight into understanding...
Antanas Lipeika