980 search results - page 6 / 196 » Novel Test Pattern Generators for Pseudo-Exhaustive Testing |
ATS
2003
IEEE
14 years 2 months ago
2003
IEEE
Recent probabilistic test generation approaches have proven that detecting single stuck-at faults multiple times is effective at reducing the defective part level (DPL). Unfortuna...
DAC
1999
ACM
14 years 1 months ago
1999
ACM
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests which can be run at native speeds is becoming a serious proble...
VTS
2000
IEEE
14 years 1 months ago
2000
IEEE
We propose a novel BIST technique for non-scan sequential circuits which does not modify the circuit under test. It uses a learning algorithm to build a hardware test sequence gen...
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
– In this paper, we present an open architecture Virtual Test Environment (VTE) which can be easily integrated into various modularized Automatic Test Systems (ATS) compliant to ...
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
| This paper reports the design of a Test Pattern Generator (TPG) for VLSI circuits. The onchip TPG is so designed that it generates test patterns while avoiding generation of a gi...