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DSD
2010
IEEE
137views Hardware» more  DSD 2010»
13 years 5 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
SODA
2010
ACM
205views Algorithms» more  SODA 2010»
14 years 5 months ago
Maximum Flows and Parametric Shortest Paths in Planar Graphs
We observe that the classical maximum flow problem in any directed planar graph G can be reformulated as a parametric shortest path problem in the oriented dual graph G . This ref...
Jeff Erickson
ICCD
2006
IEEE
103views Hardware» more  ICCD 2006»
14 years 4 months ago
Architectural Support for Run-Time Validation of Control Flow Transfer
—Current micro-architecture blindly uses the address in the program counter to fetch and execute instructions without validating its legitimacy. Whenever this blind-folded instru...
Yixin Shi, Sean Dempsey, Gyungho Lee
VISUALIZATION
1998
IEEE
13 years 12 months ago
Real-time techniques for 3D flow visualization
Visualization of three dimensional flow has to overcome a lot of problems to be effective. Among them are occlusion of distant details, lack of directional and depth hints and clu...
Anton L. Fuhrmann, Eduard Gröller
CVPR
2009
IEEE
15 years 2 months ago
Learning Visual Flows: A Lie Algebraic Approach
We present a novel method for modeling dynamic visual phenomena, which consists of two key aspects. First, the in- tegral motion of constituent elements in a dynamic scene is ca...
Dahua Lin, W. Eric L. Grimson, John W. Fisher III