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» On Fault Testing for Reversible Circuits
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DATE
2000
IEEE
65views Hardware» more  DATE 2000»
14 years 1 months ago
Test Quality and Fault Risk in Digital Filter Datapath BIST
An objective of DSP testing should be to ensure that any errors due to missed faults are infrequent compared to a circuit’s intrinsic errors, such as overflow. A method is prop...
Laurence Goodby, Alex Orailoglu
DAC
1998
ACM
14 years 24 days ago
Efficient Analog Test Methodology Based on Adaptive Algorithms
This papers describes a new, fast and economical methodology to test linear analog circuits based on adaptive algorithms. To the authors knowledge, this is the first time such tec...
Luigi Carro, Marcelo Negreiros
ATS
1998
IEEE
76views Hardware» more  ATS 1998»
14 years 25 days ago
Partitioning and Reordering Techniques for Static Test Sequence Compaction of Sequential Circuits
We propose a new static test set compaction method based on a careful examination of attributes of fault coverage curves. Our method is based on two key ideas: 1 fault-list and te...
Michael S. Hsiao, Srimat T. Chakradhar
ICCAD
1998
IEEE
116views Hardware» more  ICCAD 1998»
14 years 25 days ago
On primitive fault test generation in non-scan sequential circuits
A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses t...
Ramesh C. Tekumalla, Premachandran R. Menon
DATE
2006
IEEE
98views Hardware» more  DATE 2006»
14 years 2 months ago
Test generation for combinational quantum cellular automata (QCA) circuits
— In this paper, we present a test generation framework for testing of quantum cellular automata (QCA) circuits. QCA is a nanotechnology that has attracted significant recent at...
Pallav Gupta, Niraj K. Jha, Loganathan Lingappan