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DAC
2006
ACM
14 years 10 months ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...
LCTRTS
2007
Springer
14 years 4 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
KDD
2008
ACM
199views Data Mining» more  KDD 2008»
14 years 10 months ago
Efficient computation of personal aggregate queries on blogs
There is an exploding amount of user-generated content on the Web due to the emergence of "Web 2.0" services, such as Blogger, MySpace, Flickr, and del.icio.us. The part...
Ka Cheung Sia, Junghoo Cho, Yun Chi, Belle L. Tsen...
VLSID
2001
IEEE
184views VLSI» more  VLSID 2001»
14 years 10 months ago
Battery Life Estimation of Mobile Embedded Systems
Since battery life directly impacts the extent and duration of mobility, one of the key considerations in the design of a mobile embedded system should be to maximize the energy d...
Debashis Panigrahi, Sujit Dey, Ramesh R. Rao, Kani...
ISCA
2011
IEEE
270views Hardware» more  ISCA 2011»
13 years 1 months ago
Sampling + DMR: practical and low-overhead permanent fault detection
With technology scaling, manufacture-time and in-field permanent faults are becoming a fundamental problem. Multi-core architectures with spares can tolerate them by detecting an...
Shuou Nomura, Matthew D. Sinclair, Chen-Han Ho, Ve...