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» On Modeling Cross-Talk Faults
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ATS
2000
IEEE
116views Hardware» more  ATS 2000»
14 years 1 months ago
An experimental analysis of spot defects in SRAMs: realistic fault models and tests
: In this paper a complete analysis of spot defects in industrial SRAMs will be presented. All possible defects are simulated, and the resulting electrical faults are transformed i...
Said Hamdioui, A. J. van de Goor
CHES
2011
Springer
271views Cryptology» more  CHES 2011»
12 years 8 months ago
Modulus Fault Attacks against RSA-CRT Signatures
RSA-CRT fault attacks have been an active research area since their discovery by Boneh, DeMillo and Lipton in 1997. We present alternative key-recovery attacks on RSA-CRT signature...
Eric Brier, David Naccache, Phong Q. Nguyen, Mehdi...
VLSID
2002
IEEE
97views VLSI» more  VLSID 2002»
14 years 9 months ago
Multiple Faults: Modeling, Simulation and Test
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
Yong Chang Kim, Vishwani D. Agrawal, Kewal K. Salu...
IACR
2011
128views more  IACR 2011»
12 years 8 months ago
Fault-propagation Pattern Based DFA on SPN Structure Block Ciphers using Bitwise Permutation, with Application to PRESENT and PR
—This paper proposes a novel fault-propagation pattern based differential fault analysis method - FPP-DFA, and proves its feasibility on SPN structure block ciphers using bitwise...
Xin-jie Zhao, Tao Wang, Shi-ze Guo
ICCAD
1994
IEEE
87views Hardware» more  ICCAD 1994»
14 years 21 days ago
On testing delay faults in macro-based combinational circuits
We consider the problem of testing for delay faults in macrobased circuits. Macro-based circuits are obtained as a result of technology mapping. Gate-level fault models cannot be ...
Irith Pomeranz, Sudhakar M. Reddy