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» On Structural vs. Functional Testing for Delay Faults
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DATE
2005
IEEE
122views Hardware» more  DATE 2005»
14 years 1 months ago
Diagnostic and Detection Fault Collapsing for Multiple Output Circuits
We discuss fault equivalence and dominance relations for multiple output combinational circuits. The conventional definition for equivalence says that “Two faults are equivalen...
Raja K. K. R. Sandireddy, Vishwani D. Agrawal
STVR
2010
80views more  STVR 2010»
13 years 2 months ago
Testing coupling relationships in object-oriented programs
As we move to developing object-oriented programs, the complexity traditionally found in functions and procedures is moving to the connections among components. Different faults o...
Roger T. Alexander, Jeff Offutt, Andreas Stefik
DAC
2006
ACM
13 years 9 months ago
Systematic software-based self-test for pipelined processors
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis H...
ICCAD
1994
IEEE
76views Hardware» more  ICCAD 1994»
13 years 11 months ago
An efficient procedure for the synthesis of fast self-testable controller structures
The BIST implementation of a conventionally synthesized controller in most cases requires the integration of an additional register only for test purposes. This leads to some seri...
Sybille Hellebrand, Hans-Joachim Wunderlich
DATE
2006
IEEE
66views Hardware» more  DATE 2006»
14 years 1 months ago
On test conditions for the detection of open defects
The impact of test conditions on the detectability of open defects is investigated. We performed an inductive fault analysis on representative standard gates. The simulation resul...
Bram Kruseman, Manuel Heiligers