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» On Structural vs. Functional Testing for Delay Faults
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ATS
2003
IEEE
75views Hardware» more  ATS 2003»
14 years 28 days ago
An Enhanced Test Generator for Capacitance Induced Crosstalk Delay Faults
Capacitive crosstalk can give rise to slowdown of signals that can propagate to a circuit output and create a functional error. A test generation methodology, called XGEN, was dev...
Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer
ISMVL
2007
IEEE
92views Hardware» more  ISMVL 2007»
14 years 1 months ago
Experimental Studies on SAT-Based ATPG for Gate Delay Faults
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
Stephan Eggersglüß, Daniel Tille, G&oum...
DAC
2007
ACM
14 years 8 months ago
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
VTS
2008
IEEE
83views Hardware» more  VTS 2008»
14 years 2 months ago
LS-TDF: Low-Switching Transition Delay Fault Pattern Generation
— Higher chip densities and the push for higher performance have continued to drive design needs. Transition delay fault testing has become the preferred method for ensuring thes...
Jeremy Lee, Mohammad Tehranipoor
ITC
2003
IEEE
151views Hardware» more  ITC 2003»
14 years 27 days ago
Fault Collapsing via Functional Dominance
A fault fj is said to dominate another fault fi if all tests for fi detect fj . When two faults dominate each other, they are called equivalent. Dominance and equivalence relation...
Vishwani D. Agrawal, A. V. S. S. Prasad, Madhusuda...