115 search results - page 10 / 23 » On the Design of IEEE Compliant Floating Point Units |
DATE
2010
IEEE
14 years 25 days ago
2010
IEEE
—This paper presents the definition of an integrated processor core ASIC named SCOC3 which is designed for space computers. It also presents the validation method that has led to...
ARITH
2007
IEEE
14 years 2 months ago
2007
IEEE
Decimal multiplication is important in many commercial applications including financial analysis, banking, tax calculation, currency conversion, insurance, and accounting. This p...
ARITH
2009
IEEE
14 years 2 months ago
2009
IEEE
The design of a component to perform parallel addition of multiple floating-point (FP) operands is explored in this work. In particular, a 3-input FP adder is discussed in more d...
DSD
2003
IEEE
14 years 1 months ago
2003
IEEE
Double precision floating-point arithmetic is inadequate for many scientific computations. This paper presents the design of a quadruple precision floating-point multiplier tha...
ISMVL
2010
IEEE
14 years 17 days ago
2010
IEEE
This paper proposes a new architecture for memorybased floating-point numeric function generators (NFGs). The design method uses piecewise-split edge-valued multivalued decision ...