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» On the Fault Testing for Reversible Circuits
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ITC
2003
IEEE
151views Hardware» more  ITC 2003»
14 years 1 months ago
Fault Collapsing via Functional Dominance
A fault fj is said to dominate another fault fi if all tests for fi detect fj . When two faults dominate each other, they are called equivalent. Dominance and equivalence relation...
Vishwani D. Agrawal, A. V. S. S. Prasad, Madhusuda...
ASYNC
2000
IEEE
122views Hardware» more  ASYNC 2000»
14 years 1 months ago
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits
Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Eberge...
Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen...
DATE
1999
IEEE
102views Hardware» more  DATE 1999»
14 years 28 days ago
Minimal Length Diagnostic Tests for Analog Circuits using Test History
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
Alfred V. Gomes, Abhijit Chatterjee
ITC
1997
IEEE
119views Hardware» more  ITC 1997»
14 years 4 days ago
Testability Analysis and ATPG on Behavioral RT-Level VHDL
This paper proposes an environment to address Testability Analysis and Test Pattern Generation on VHDL descriptions at the RT-level. The proposed approach, based on a suitable fau...
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
ITC
2002
IEEE
72views Hardware» more  ITC 2002»
14 years 1 months ago
Test Point Insertion that Facilitates ATPG in Reducing Test Time and Data Volume
Efficient production testing is frequently hampered because current digital circuits require test sets which are too large. These test sets can be reduced significantly by means...
M. J. Geuzebroek, J. Th. van der Linden, A. J. van...