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» On the Fault Testing for Reversible Circuits
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ICCAD
2006
IEEE
183views Hardware» more  ICCAD 2006»
14 years 4 months ago
Soft error derating computation in sequential circuits
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...
Hossein Asadi, Mehdi Baradaran Tahoori
DATE
1998
IEEE
74views Hardware» more  DATE 1998»
13 years 11 months ago
State Relaxation Based Subsequence Removal for Fast Static Compaction in Sequential Circuits
We extend the subsequence removal technique to provide signi cantly higher static compaction for sequential circuits. We show that state relaxation techniques can be used to ident...
Michael S. Hsiao, Srimat T. Chakradhar
ICCD
2003
IEEE
109views Hardware» more  ICCD 2003»
14 years 4 months ago
Independent Test Sequence Compaction through Integer Programming
We discuss the compaction of independent test sequences for sequential circuits. Our first contribution is the formulation of this problem as an integer program, which we then so...
Petros Drineas, Yiorgos Makris
ATS
2005
IEEE
100views Hardware» more  ATS 2005»
14 years 1 months ago
Finite State Machine Synthesis for At-Speed Oscillation Testability
In this paper, we propose an oscillation-based test methodology for sequential testing. This approach provides many advantages over traditional methods. (1) It is at-speed testing...
Katherine Shu-Min Li, Chung-Len Lee, Tagin Jiang, ...
VTS
1998
IEEE
124views Hardware» more  VTS 1998»
13 years 11 months ago
A Test Pattern Generation Methodology for Low-Power Consumption
This paper proposes an ATPG technique that reduces power dissipation during the test of sequential circuits. The proposed approach exploits some redundancy introduced during the t...
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...