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ISLPED
2005
ACM
86views Hardware» more  ISLPED 2005»
14 years 2 months ago
An evaluation of code and data optimizations in the context of disk power reduction
Disk power management is becoming increasingly important in high-end server and cluster type of environments that execute dataintensive applications. While hardware-only approache...
Mahmut T. Kandemir, Seung Woo Son, Guangyu Chen
ISLPED
2004
ACM
151views Hardware» more  ISLPED 2004»
14 years 1 months ago
Dynamic voltage and frequency scaling based on workload decomposition
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
DAC
2009
ACM
14 years 9 months ago
Way Stealing:cache-assisted automatic instruction set extensions
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
SBACPAD
2005
IEEE
139views Hardware» more  SBACPAD 2005»
14 years 2 months ago
Chained In-Order/Out-of-Order DoubleCore Architecture
Complexity is one of the most important problems facing microarchitects. It is exacerbated by the application of optimizations, by scaling to higher issue widths and, in general, ...
Miquel Pericàs, Adrián Cristal, Rube...
CASES
2003
ACM
14 years 1 months ago
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main ...
Federico Angiolini, Luca Benini, Alberto Caprara