44 search results - page 7 / 9 » On the role of timing masking in reliable logic circuit desi... |
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
ASYNC
2000
IEEE
13 years 12 months ago
2000
IEEE
Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Eberge...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. This paper proposes a method of characterizing correlation of signal tra...
ICCAD
2010
IEEE
13 years 5 months ago
2010
IEEE
Reducing circuit's peak current plays an important role in circuit reliability in deep sub-micron era. For sequential circuits, it is observed that the peak current has a str...
TVLSI
1998
13 years 7 months ago
1998
— Wave pipelining offers a unique combination of high speed, low latency, and moderate power consumption. The construction of wave pipelines is benefited by the use of gates and...