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TCAD
2010
116views more  TCAD 2010»
13 years 2 months ago
MeshWorks: A Comprehensive Framework for Optimized Clock Mesh Network Synthesis
Clock mesh networks are well known for their variation tolerance. But their usage is limited to high-end designs due to the significantly high resource requirements compared to clo...
Anand Rajaram, David Z. Pan
DATE
2010
IEEE
118views Hardware» more  DATE 2010»
13 years 6 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung
ICCAD
2000
IEEE
188views Hardware» more  ICCAD 2000»
14 years 2 days ago
Bus Optimization for Low-Power Data Path Synthesis Based on Network Flow Method
— Sub-micron feature sizes have resulted in a considerable portion of power to be dissipated on the buses, causing an increased attention on savings for power at the behavioral l...
Sungpack Hong, Taewhan Kim
CCE
2008
13 years 7 months ago
Optimal synthesis of heat exchanger networks involving isothermal process streams
This paper proposes a new MINLP model for heat exchanger network synthesis that includes streams with phase change. The model considers every possible combination of process strea...
José María Ponce-Ortega, Arturo Jim&...
IESS
2007
Springer
165views Hardware» more  IESS 2007»
14 years 1 months ago
Data Reuse Driven Memory and Network-On-Chip Co-Synthesis
NoCs present a possible communication infrastructure solution to deal with increased design complexity and shrinking time-to-market. The communication infrastructure is a signific...
Ilya Issenin, Nikil Dutt