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» Optimal Hardware Pattern Generation for Functional BIST
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DATE
2008
IEEE
131views Hardware» more  DATE 2008»
14 years 2 months ago
Optimal High-Resolution Spectral Analyzer
This paper presents a new application field for the Goertzel algorithm. The test of mixed-signal circuits involves the generation and analysis of signals. A standard method for th...
A. Tchegho, Heinz Mattes, Sebastian Sattler
GECCO
2005
Springer
232views Optimization» more  GECCO 2005»
14 years 1 months ago
A hardware pipeline for function optimization using genetic algorithms
Genetic Algorithms (GAs) are very commonly used as function optimizers, basically due to their search capability. A number of different serial and parallel versions of GA exist. ...
Malay Kumar Pakhira, Rajat K. De
ICCD
2001
IEEE
119views Hardware» more  ICCD 2001»
14 years 4 months ago
A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage
We present a simulation-based semi-formal verification method for sequential circuits described at the registertransfer level. The method consists of an iterative loop where cove...
Serdar Tasiran, Farzan Fallah, David G. Chinnery, ...
VTS
2000
IEEE
95views Hardware» more  VTS 2000»
13 years 12 months ago
DEFUSE: A Deterministic Functional Self-Test Methodology for Processors
1 At-speed testing is becoming increasingly difficult with external testers as the speed of microprocessors approaches the GHz range. One solution to this problem is built-in self-...
Li Chen, Sujit Dey
DATE
2000
IEEE
139views Hardware» more  DATE 2000»
13 years 12 months ago
A VHDL Error Simulator for Functional Test Generation
This paper describes an efficient error simulator able to analyze functional VHDL descriptions. The proposed simulation environment can be based on commercial VHDL simulators. Al...
Alessandro Fin, Franco Fummi