261 search results - page 4 / 53 » Optimal Hardware Pattern Generation for Functional BIST |
ITC
2000
IEEE
13 years 11 months ago
2000
IEEE
1 The term "functional BIST" describes a test method to control functional modules so that they generate a deterministic test set, which targets structural faults within ...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
Abstract— We present a general method to evaluate RF BuiltIn Self-Test (BIST) techniques during the design stage. In particular, the adaptive kernel estimator is used to construc...
DATE
2003
IEEE
14 years 23 days ago
2003
IEEE
VLSID
2005
IEEE
14 years 1 months ago
2005
IEEE
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
ICCAD
1996
IEEE
13 years 11 months ago
1996
IEEE
A scan-based BIST scheme is presented which guarantees complete fault coverage with very low hardware overhead. A probabilistic analysis shows that the output of an LFSR which fee...